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Microchip Technology /ATSAMV71Q20 /PWM0 /ETRG1

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Interpret as ETRG1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MAXCNT0 (OFF)TRGMODE 0 (FALLING_ZERO)TRGEDGE 0 (TRGFILT)TRGFILT 0 (TRGSRC)TRGSRC 0 (RFEN)RFEN

TRGEDGE=FALLING_ZERO, TRGMODE=OFF

Description

PWM External Trigger Register (trg_num = 1)

Fields

MAXCNT

Maximum Counter value
TRGMODE

External Trigger Mode

0 (OFF): External trigger is not enabled.

1 (MODE1): External PWM Reset Mode

2 (MODE2): External PWM Start Mode

3 (MODE3): Cycle-by-cycle Duty Mode
TRGEDGE

Edge Selection

0 (FALLING_ZERO): TRGMODE = 1: TRGINx event detection on falling edge.TRGMODE = 2, 3: TRGINx active level is 0

1 (RISING_ONE): TRGMODE = 1: TRGINx event detection on rising edge.TRGMODE = 2, 3: TRGINx active level is 1
TRGFILT

Filtered input
TRGSRC

Trigger Source
RFEN

Recoverable Fault Enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data